C:\books\Hcs12_toship\programs\ch12\eg12_07.lst - generated by MGTEK Assembler ASM12 V1.22 Build 137 for WIN32 (x86) - Mon Feb 21 06:59:09 2005 1: #include "c:\miniide\hcs12.inc" 1: ; ************************************************************************ 2: ; Prepared by Dr. Han-Way Huang 3: ; Date: 12/31/2004 4: ; HC12SDP256 I/O register locations 5: ; HCS12 peripheral bits definitions 6: ; D-Bug12 I/O functions calling address 7: ; D-Bug12 SRAM interrupt vector table 8: ; Flash and EEPROM commands 9: ; ************************************************************************ 10: 11: =00000000 PORTA equ 0 ; port a = address lines a8 - a15 12: =00000000 PTA equ 0 ; alternate name for PORTA 13: =00000001 PORTB equ 1 ; port b = address lines a0 - a7 14: =00000001 PTB equ 1 ; alternate name for PORTB 15: =00000002 DDRA equ 2 ; port a direction register 16: =00000003 DDRB equ 3 ; port a direction register 17: 18: =00000008 PORTE equ 8 ; port e = mode,irqandcontrolsignals 19: =00000008 PTE equ 8 ; alternate name for PORTE 20: =00000009 DDRE equ 9 ; port e direction register 21: =0000000A PEAR equ $a ; port e assignments 22: =0000000B MODE equ $b ; mode register 23: =0000000C PUCR equ $c ; port pull-up control register 24: =0000000D RDRIV equ $d ; port reduced drive control register 25: =0000000E EBICTL equ $e ; e stretch control 26: 27: =00000010 INITRM equ $10 ; ram location register 28: =00000011 INITRG equ $11 ; register location register 29: =00000012 INITEE equ $12 ; eeprom location register 30: =00000013 MISC equ $13 ; miscellaneous mapping control 31: =00000014 MTST0 equ $14 ; reserved 32: =00000015 ITCR equ $15 ; interrupt test control register 33: =00000016 ITEST equ $16 ; interrupt test register 34: =00000017 MTST1 equ $17 ; reserved 35: 36: =0000001A PARTIDH equ $1a ; part id high 37: =0000001B PARTIDL equ $1b ; part id low 38: =0000001C MEMSIZ0 equ $1c ; memory size 39: =0000001D MEMSIZ1 equ $1d ; memory size 40: =0000001E INTCR equ $1e ; interrupt control register 41: =0000001E IRQCR equ $1e ; interrupt control register 42: =0000001F HPRIO equ $1f ; high priority reg 43: 44: =00000028 BKPCT0 equ $28 ; break control register 45: =00000029 BKPCT1 equ $29 ; break control register 46: =0000002A BKP0X equ $2a ; break 0 index register 47: =0000002B BKP0H equ $2b ; break 0 pointer high 48: =0000002C BRP0L equ $2c ; break 0 pointer low 49: =0000002D BKP1X equ $2d ; break 1 index register 50: =0000002E BKP1H equ $2e ; break 1 pointer high 51: =0000002F BRP1L equ $2f ; break 1 pointer low 52: =00000030 PPAGE equ $30 ; program page register 53: 54: =00000032 PORTK equ $32 ; port k data 55: =00000032 PTK equ $32 ; alternate name for PORTK 56: =00000033 DDRK equ $33 ; port k direction 57: =00000034 SYNR equ $34 ; synthesizer / multiplier register 58: =00000035 REFDV equ $35 ; reference divider register 59: =00000036 CTFLG equ $36 ; reserved 60: =00000037 CRGFLG equ $37 ; pll flags register 61: =00000038 CRGINT equ $38 ; pll interrupt register 62: =00000039 CLKSEL equ $39 ; clock select register 63: =0000003A PLLCTL equ $3a ; pll control register 64: =0000003B RTICTL equ $3b ; real time interrupt control 65: =0000003C COPCTL equ $3c ; watchdog control 66: =0000003D FORBYP equ $3d ; 67: =0000003E CTCTL equ $3e ; 68: =0000003F ARMCOP equ $3f ; cop reset register 69: 70: =00000040 TIOS equ $40 ; timer input/output select 71: =00000041 CFORC equ $41 ; timer compare force 72: =00000042 OC7M equ $42 ; timer output compare 7 mask 73: =00000043 OC7D equ $43 ; timer output compare 7 data 74: =00000044 TCNT equ $44 ; timer counter register hi 75: =00000046 TSCR1 equ $46 ; timer system control register 76: =00000046 TSCR equ $46 ; 77: =00000047 TTOV equ $47 ; reserved 78: =00000048 TCTL1 equ $48 ; timer control register 1 79: =00000049 TCTL2 equ $49 ; timer control register 2 80: =0000004A TCTL3 equ $4a ; timer control register 3 81: =0000004B TCTL4 equ $4b ; timer control register 4 82: =0000004C TMSK1 equ $4c ; timer interrupt mask 1 83: =0000004C TIE equ $4C ; 84: =0000004D TSCR2 equ $4d ; timer system control register 2 85: =0000004E TFLG1 equ $4e ; timer flags 1 86: =0000004F TFLG2 equ $4f ; timer flags 2 87: =00000050 TC0 equ $50 ; timer capture/compare register 0 88: =00000052 TC1 equ $52 ; timer capture/compare register 1 89: =00000054 TC2 equ $54 ; timer capture/compare register 2 90: =00000056 TC3 equ $56 ; timer capture/compare register 3 91: =00000058 TC4 equ $58 ; timer capture/compare register 4 92: =0000005A TC5 equ $5a ; timer capture/compare register 5 93: =0000005C TC6 equ $5c ; timer capture/compare register 6 94: =0000005E TC7 equ $5e ; timer capture/compare register 7 95: =00000060 PACTL equ $60 ; pulse accumulator controls 96: =00000061 PAFLG equ $61 ; pulse accumulator flags 97: =00000062 PACNT equ $62 ; pulse accumulator A counter 98: =00000062 PACN3 equ $62 ; pulse accumulator counter 3 99: =00000063 PACN2 equ $63 ; pulse accumulator counter 2 100: =00000064 PBCNT equ $64 ; pulse accumulator B counter 101: =00000064 PACN1 equ $64 ; pulse accumulator counter 1 102: =00000065 PACN0 equ $65 ; pulse accumulator counter 0 103: =00000066 MCCTL equ $66 ; modulus down conunter control 104: =00000067 MCFLG equ $67 ; down counter flags 105: =00000068 ICPAR equ $68 ; input pulse accumulator control 106: =00000069 DLYCT equ $69 ; delay count to down counter 107: =0000006A ICOVW equ $6a ; input control overwrite register 108: =0000006B ICSYS equ $6b ; input control system control 109: 110: =0000006D TIMTST equ $6d ; timer test register 111: 112: =00000070 PBCTL equ $70 ; pulse accumulator b control 113: =00000071 PBFLG equ $71 ; pulse accumulator b flags 114: =00000072 PA3H equ $72 ; pulse accumulator holding register 3 115: =00000073 PA2H equ $73 ; pulse accumulator holding register 2 116: =00000074 PA1H equ $74 ; pulse accumulator holding register 1 117: =00000075 PA0H equ $75 ; pulse accumulator holding register 0 118: =00000076 MCCNT equ $76 ; modulus down counter register 119: *MCCNTL equ $77 ; low byte 120: =00000078 TCOH equ $78 ; capture 0 holding register 121: =0000007A TC1H equ $7a ; capture 1 holding register 122: =0000007C TC2H equ $7c ; capture 2 holding register 123: =0000007E TC3H equ $7e ; capture 3 holding register 124: 125: =00000080 ATD0CTL0 equ $80 ; adc control 0 (reserved) 126: =00000081 ATD0CTL1 equ $81 ; adc control 1 (reserved) 127: =00000082 ATD0CTL2 equ $82 ; adc control 2 128: =00000083 ATD0CTL3 equ $83 ; adc control 3 129: =00000084 ATD0CTL4 equ $84 ; adc control 4 130: =00000085 ATD0CTL5 equ $85 ; adc control 5 131: =00000086 ATD0STAT0 equ $86 ; adc status register 0 132: =00000088 ATD0TEST0 equ $88 ; adc test 0(reserved) 133: =00000089 ATD0TEST1 equ $89 ; adc test 1(reserved) 134: 135: =0000008D ATD0DIEN equ $8d ; adc0 input enable register 136: =0000008F PORTAD0 equ $8f ; port adc = input only 137: =0000008F PTAD0 equ $8F 138: =00000090 ATD0DR0 equ $90 ; adc result 0 register 139: =00000092 ATD0DR1 equ $92 ; adc result 1 register 140: =00000094 ATD0DR2 equ $94 ; adc result 2 register 141: =00000096 ATD0DR3 equ $96 ; adc result 3 register 142: =00000098 ATD0DR4 equ $98 ; adc result 4 register 143: =0000009A ATD0DR5 equ $9a ; adc result 5 register 144: =0000009C ATD0DR6 equ $9c ; adc result 6 register 145: =0000009E ATD0DR7 equ $9e ; adc result 7 register 146: 147: =000000A0 PWME equ $a0 ; pwm enable 148: =000000A1 PWMPOL equ $a1 ; pwm polarity 149: =000000A2 PWMCLK equ $a2 ; pwm clock select register 150: =000000A3 PWMPRCLK equ $a3 ; pwm prescale clock select register 151: =000000A4 PWMCAE equ $a4 ; pwm center align select register 152: =000000A5 PWMCTL equ $a5 ; pwm control register 153: =000000A6 PWMTST equ $a6 ; reserved 154: =000000A7 PWMPRSC equ $a7 ; reserved 155: =000000A8 PWMSCLA equ $a8 ; pwm scale a 156: =000000A9 PWMSCLB equ $a9 ; pwm scale b 157: =000000AA PWMSCNTA equ $aa ; reserved 158: =000000AB PWMSCNTB equ $ab ; reserved 159: =000000AC PWMCNT0 equ $ac ; pwm channel 0 counter 160: =000000AD PWMCNT1 equ $ad ; pwm channel 1 counter 161: =000000AE PWMCNT2 equ $ae ; pwm channel 2 counter 162: =000000AF PWMCNT3 equ $af ; pwm channel 3 counter 163: 164: 165: =000000B0 PWMCNT4 equ $b0 ; pwm channel 4 COUNTER 166: =000000B1 PWMCNT5 equ $b1 ; pwm channel 5 counter 167: =000000B2 PWMCNT6 equ $b2 ; pwm channel 6 counter 168: =000000B3 PWMCNT7 equ $b3 ; pwm channel 7 counter 169: =000000B4 PWMPER0 equ $b4 ; pwm channel 0 period 170: =000000B5 PWMPER1 equ $b5 ; pwm channel 1 period 171: =000000B6 PWMPER2 equ $b6 ; pwm channel 2 period 172: =000000B7 PWMPER3 equ $b7 ; pwm channel 3 period 173: =000000B8 PWMPER4 equ $b8 ; pwm channel 4 period 174: =000000B9 PWMPER5 equ $b9 ; pwm channel 5 period 175: =000000BA PWMPER6 equ $ba ; pwm channel 6 period 176: =000000BB PWMPER7 equ $bb ; pwm channel 7 period 177: =000000BC PWMDTY0 equ $bc ; pwm channel 0 duty cycle 178: =000000BD PWMDTY1 equ $bd ; pwm channel 1 duty cycle 179: =000000BE PWMDTY2 equ $be ; pwm channel 2 duty cycle 180: =000000BF PWMDTY3 equ $bf ; pwm channel 3 duty cycle 181: =000000C0 PWMDTY4 equ $c0 ; pwm channel 0 duty cycle 182: =000000C1 PWMDTY5 equ $c1 ; pwm channel 1 duty cycle 183: =000000C2 PWMDTY6 equ $c2 ; pwm channel 2 duty cycle 184: =000000C3 PWMDTY7 equ $c3 ; pwm channel 3 duty cycle 185: =000000C4 PWMSDN equ $c4 ; pwm shutdown register 186: 187: =000000C8 SCI0BDH equ $c8 ; sci 0 baud reg hi byte 188: =000000C9 SCI0BDL equ $c9 ; sci 0 baud reg lo byte 189: =000000CA SCI0CR1 equ $ca ; sci 0 control1 reg 190: =000000CB SCI0CR2 equ $cb ; sci 0 status reg 1 191: =000000CC SCI0SR1 equ $cc ; sci 0 status reg 1 192: =000000CD SCI0SR2 equ $cd ; sci 0 status reg 2 193: =000000CE SCI0DRH equ $ce ; sci 0 data reg hi 194: =000000CF SCI0DRL equ $cf ; sci 0 data reg lo 195: =000000D0 SCI1BDH equ $d0 ; sci 1 baud reg hi byte 196: =000000D1 SCI1BDL equ $d1 ; sci 1 baud reg lo byte 197: =000000D2 SCI1CR1 equ $d2 ; sci 1 control1 reg 198: =000000D3 SCI1CR2 equ $d3 ; sci 1 control2 reg 199: =000000D4 SCI1SR1 equ $d4 ; sci 1 status reg 1 200: =000000D5 SCI1SR2 equ $d5 ; sci 1 status reg 2 201: =000000D6 SCI1DRH equ $d6 ; sci 1 data reg lo 202: =000000D8 SPI0CR1 equ $d8 ; spi 0 control1 reg 203: =000000D9 SPI0CR2 equ $d9 ; spi 0 control2 reg 204: =000000DA SPI0BR equ $da ; spi 0 baud reg 205: =000000DB SPI0SR equ $db ; spi 0 status reg hi 206: 207: =000000DD SPI0DR equ $dd ; spi 0 data reg 208: 209: =000000E0 IBAD equ $e0 ; i2c bus address register 210: =000000E1 IBFD equ $e1 ; i2c bus frequency divider 211: =000000E2 IBCR equ $e2 ; i2c bus control register 212: =000000E3 IBSR equ $e3 ; i2c bus status register 213: =000000E4 IBDR equ $e4 ; i2c bus message data register 214: 215: =000000E8 DLCBCR1 equ $e8 ; bdlc control register 1 216: =000000E9 DLCBSVR equ $e9 ; bdlc state vector register 217: =000000EA DLCBCR2 equ $ea ; bdlc control register 2 218: =000000EB DLCBDR equ $eb ; bdlc data register 219: =000000EC DLCBARD equ $ec ; bdlc analog delay register 220: =000000ED DLCBRSR equ $ed ; bdlc rate select register 221: =000000EE DLCSCR equ $ee ; bdlc control register 222: =000000EF DLCBSTAT equ $ef ; bdlc status register 223: =000000F0 SPI1CR1 equ $f0 ; spi 1 control1 reg 224: =000000F1 SPI1CR2 equ $f1 ; spi 1 control2 reg 225: =000000F2 SPI1BR equ $f2 ; spi 1 baud reg 226: =000000F3 SPI1SR equ $f3 ; spi 1 status reg hi 227: 228: =000000F5 SP1DR equ $f5 ; spi 1 data reg 229: 230: =000000F8 SPI2CR1 equ $f8 ; spi 2 control1 reg 231: =000000F9 SPI2CR2 equ $f9 ; spi 2 control2 reg 232: =000000FA SPI2BR equ $fa ; spi 2 baud reg 233: =000000FB SPI2SR equ $fb ; spi 2 status reg hi 234: 235: =000000FD SP2DR equ $fd ; spi 2 data reg 236: 237: =00000100 FCLKDIV equ $100 ; flash clock divider 238: =00000101 FSEC equ $101 ; flash security register 239: =00000102 FTSTMOD equ $102 240: =00000103 FCNFG equ $103 ; flash configuration register 241: =00000104 FPROT equ $104 ; flash protection register 242: =00000105 FSTAT equ $105 ; flash status register 243: =00000106 FCMD equ $106 ; flash command register 244: =00000108 FADDR equ $108 ; 16-bit address register 245: =0000010A FDATA equ $10A ; 16-bit data register 246: 247: =00000110 ECLKDIV equ $110 ; eeprom clock divider 248: =00000113 ECNFG equ $113 ; eeprom configuration register 249: =00000114 EPROT equ $114 ; eeprom protection register 250: =00000115 ESTAT equ $115 ; eeprom status register 251: =00000116 ECMD equ $116 ; eeprom command register 252: 253: =00000120 ATD1CTL0 equ $120 ; adc1 control 0 (reserved) 254: =00000121 ATD1CTL1 equ $121 ; adc1 control 1 (reserved) 255: =00000122 ATD1CTL2 equ $122 ; adc1 control 2 256: =00000123 ATD1CTL3 equ $123 ; adc1 control 3 257: =00000124 ATD1CTL4 equ $124 ; adc1 control 4 258: =00000125 ATD1CTL5 equ $125 ; adc1 control 5 259: =00000126 ATD1STAT0 equ $126 ; adc1 status register 260: =00000128 ATD1TEST0 equ $128 ; adc1 test register 0 (reserved) 261: =00000129 ATD1TEST1 equ $129 ; adc1 test register 1 (reserved) 262: =0000012B ATD1STAT1 equ $12B 263: =0000012D ATD1DIEN equ $12d ; adc1 input enable register 264: 265: =0000012F PORTAD1 equ $12f ; port adc1 = input only 266: =0000012F PTAD1 equ $12F 267: =00000130 ATD1DR0 equ $130 ; adc1 result 0 register 268: =00000132 ATD1DR1 equ $132 ; adc1 result 1 register 269: =00000134 ATD1DR2 equ $134 ; adc1 result 2 register 270: =00000136 ATD1DR3 equ $136 ; adc1 result 3 register 271: =00000138 ATD1DR4 equ $138 ; adc1 result 4 register 272: =0000013A ATD1DR5 equ $13a ; adc1 result 5 register 273: =0000013C ATD1DR6 equ $13c ; adc1 result 6 register 274: =0000013E ATD1DR7 equ $13e ; adc1 result 7 register 275: =00000140 CAN0CTL0 equ $140 ; can0 control register 0 276: =00000141 CAN0CTL1 equ $141 ; can0 control register 1 277: =00000142 CAN0BTR0 equ $142 ; can0 bus timing register 0 278: =00000143 CAN0BTR1 equ $143 ; can0 bus timing register 1 279: =00000144 CAN0RFLG equ $144 ; can0 receiver flags 280: =00000145 CAN0RIER equ $145 ; can0 receiver interrupt enables 281: =00000146 CAN0TFLG equ $146 ; can0 transmit flags 282: =00000147 CAN0TIER equ $147 ; can0 transmit interrupt enables 283: =00000148 CAN0TARQ equ $148 ; can0 transmit message abort control 284: =00000149 CAN0TAAK equ $149 ; can0 transmit message abort status 285: =0000014A CAN0TBSEL equ $14a ; can0 transmit buffer select 286: =0000014B CAN0IDAC equ $14b ; can0 identifier acceptance control 287: 288: =0000014E CAN0RXERR equ $14e ; can0 receive error counter 289: =0000014F CAN0TXERR equ $14f ; can0 transmit error counter 290: =00000150 CAN0IDAR0 equ $150 ; can0 identifier acceptance register 0 291: =00000151 CAN0IDAR1 equ $151 ; can0 identifier acceptance register 1 292: =00000152 CAN0IDAR2 equ $152 ; can0 identifier acceptance register 2 293: =00000153 CAN0IDAR3 equ $153 ; can0 identifier acceptance register 3 294: =00000154 CAN0IDMR0 equ $154 ; can0 identifier mask register 0 295: =00000155 CAN0IDMR1 equ $155 ; can0 identifier mask register 1 296: =00000156 CAN0IDMR2 equ $156 ; can0 identifier mask register 2 297: =00000157 CAN0IDMR3 equ $157 ; can0 identifier mask register 3 298: =00000158 CAN0IDAR4 equ $158 ; can0 identifier acceptance register 4 299: =00000159 CAN0IDAR5 equ $159 ; can0 identifier acceptance register 5 300: =0000015A CAN0IDAR6 equ $15a ; can0 identifier acceptance register 6 301: =0000015B CAN0IDAR7 equ $15b ; can0 identifier acceptance register 7 302: =0000015C CAN0IDMR4 equ $15c ; can0 identifier mask register 4 303: =0000015D CAN0IDMR5 equ $15d ; can0 identifier mask register 5 304: =0000015E CAN0IDMR6 equ $15e ; can0 identifier mask register 6 305: =0000015F CAN0IDMR7 equ $15f ; can0 identifier mask register 7 306: =00000160 CAN0RXFG equ $160 ; can0 rx foreground buffer thru +$16f 307: =00000160 CAN0RIDR0 equ $160 ; CAN0 rx foreground buffer identifier register 0 308: =00000161 CAN0RIDR1 equ $161 ; CAN0 rx foreground buffer identifier register 1 309: =00000162 CAN0RIDR2 equ $162 ; CAN0 rx foreground buffer identifier register 2 310: =00000163 CAN0RIDR3 equ $163 ; CAN0 rx foreground buffer identifier register 3 311: =00000164 CAN0RDSR0 equ $164 ; CAN0 rx foreground buffer data segment register 0 312: =00000165 CAN0RDSR1 equ $165 ; CAN0 rx foreground buffer data segment register 1 313: =00000166 CAN0RDSR2 equ $166 ; CAN0 rx foreground buffer data segment register 2 314: =00000167 CAN0RDSR3 equ $167 ; CAN0 rx foreground buffer data segment register 3 315: =00000168 CAN0RDSR4 equ $168 ; CAN0 rx foreground buffer data segment register 4 316: =00000169 CAN0RDSR5 equ $169 ; CAN0 rx foreground buffer data segment register 5 317: =0000016A CAN0RDSR6 equ $16A ; CAN0 rx foreground buffer data segment register 6 318: =0000016B CAN0RDSR7 equ $16B ; CAN0 rx foreground buffer data segment register 7 319: =0000016C CAN0RDLR equ $16C ; CAN0 rx foreground buffer data length register 320: =00000170 CAN0TXFG equ $170 ; can0 tx foreground buffer thru +$17f 321: =00000170 CAN0TIDR0 equ $170 ; CAN0 tx foreground buffer identifier register 0 322: =00000171 CAN0TIDR1 equ $171 ; CAN0 tx foreground buffer identifier register 1 323: =00000172 CAN0TIDR2 equ $172 ; CAN0 tx foreground buffer identifier register 2 324: =00000173 CAN0TIDR3 equ $173 ; CAN0 tx foreground buffer identifier register 3 325: =00000174 CAN0TDSR0 equ $174 ; CAN0 tx foreground buffer data segment register 0 326: =00000175 CAN0TDSR1 equ $175 ; CAN0 tx foreground buffer data segment register 1 327: =00000176 CAN0TDSR2 equ $176 ; CAN0 tx foreground buffer data segment register 2 328: =00000177 CAN0TDSR3 equ $177 ; CAN0 tx foreground buffer data segment register 3 329: =00000178 CAN0TDSR4 equ $178 ; CAN0 tx foreground buffer data segment register 4 330: =00000179 CAN0TDSR5 equ $179 ; CAN0 tx foreground buffer data segment register 5 331: =0000017A CAN0TDSR6 equ $17A ; CAN0 tx foreground buffer data segment register 6 332: =0000017B CAN0TDSR7 equ $17B ; CAN0 tx foreground buffer data segment register 7 333: =0000017C CAN0TDLR equ $17C ; CAN0 tx foreground buffer data length register 334: =0000017D CAN0TBPR equ $17D ; CAN0 tx foreground buffer transmit buffer priority register 335: =0000017E CAN0TSRH equ $17E ; CAN0 tx foreground buffer transmit time stamp register high 336: =0000017F CAN0TSRL equ $17F ; CAN0 tx foreground buffer transmit time stamp register low 337: 338: =00000180 CAN1CTL0 equ $180 ; can1 control register 0 339: =00000181 CAN1CTL1 equ $181 ; can1 control register 1 340: =00000182 CAN1BTR0 equ $182 ; can1 bus timing register 0 341: =00000183 CAN1BTR1 equ $183 ; can1 bus timing register 1 342: =00000184 CAN1RFLG equ $184 ; can1 receiver flags 343: =00000185 CAN1RIER equ $185 ; can1 receiver interrupt enables 344: =00000186 CAN1TFLG equ $186 ; can1 transmit flags 345: =00000187 CAN1TIER equ $187 ; can1 transmit interrupt enables 346: =00000188 CAN1TARQ equ $188 ; can1 transmit message abort control 347: =00000189 CAN1TAAK equ $189 ; can1 transmit message abort status 348: =0000018A CAN1TBSEL equ $18a ; can1 transmit buffer select 349: =0000018B CAN1IDAC equ $18b ; can1 identifier acceptance control 350: 351: =0000018E CAN1RXERR equ $18e ; can1 receive error counter 352: =0000018F CAN1TXERR equ $18f ; can1 transmit error counter 353: =00000190 CAN1IDAR0 equ $190 ; can1 identifier acceptance register 0 354: =00000191 CAN1IDAR1 equ $191 ; can1 identifier acceptance register 1 355: =00000192 CAN1IDAR2 equ $192 ; can1 identifier acceptance register 2 356: =00000193 CAN1IDAR3 equ $193 ; can1 identifier acceptance register 3 357: =00000194 CAN1IDMR0 equ $194 ; can1 identifier mask register 0 358: =00000195 CAN1IDMR1 equ $195 ; can1 identifier mask register 1 359: =00000196 CAN1IDMR2 equ $196 ; can1 identifier mask register 2 360: =00000197 CAN1IDMR3 equ $197 ; can1 identifier mask register 3 361: =00000198 CAN1IDAR4 equ $198 ; can1 identifier acceptance register 4 362: =00000199 CAN1IDAR5 equ $199 ; can1 identifier acceptance register 5 363: =0000019A CAN1IDAR6 equ $19a ; can1 identifier acceptance register 6 364: =0000019B CAN1IDAR7 equ $19b ; can1 identifier acceptance register 7 365: =0000019C CAN1IDMR4 equ $19c ; can1 identifier mask register 4 366: =0000019D CAN1IDMR5 equ $19d ; can1 identifier mask register 5 367: =0000019E CAN1IDMR6 equ $19e ; can1 identifier mask register 6 368: =0000019F CAN1IDMR7 equ $19f ; can1 identifier mask register 7 369: =000001A0 CAN1RXFG equ $1a0 ; can1 rx foreground buffer thru +$1af 370: =000001A0 CAN1RIDR0 equ $1a0 ; CAN1 rx foreground buffer identifier register 0 371: =000001A1 CAN1RIDR1 equ $1a1 ; CAN1 rx foreground buffer identifier register 1 372: =000001A2 CAN1RIDR2 equ $1a2 ; CAN1 rx foreground buffer identifier register 2 373: =000001A3 CAN1RIDR3 equ $1a3 ; CAN1 rx foreground buffer identifier register 3 374: =000001A4 CAN1RDSR0 equ $1a4 ; CAN1 rx foreground buffer data segment register 0 375: =000001A5 CAN1RDSR1 equ $1a5 ; CAN1 rx foreground buffer data segment register 1 376: =000001A6 CAN1RDSR2 equ $1a6 ; CAN1 rx foreground buffer data segment register 2 377: =000001A7 CAN1RDSR3 equ $1a7 ; CAN1 rx foreground buffer data segment register 3 378: =000001A8 CAN1RDSR4 equ $1a8 ; CAN1 rx foreground buffer data segment register 4 379: =00000169 CAN1RDSR5 equ $169 ; CAN1 rx foreground buffer data segment register 5 380: =000001AA CAN1RDSR6 equ $1aA ; CAN1 rx foreground buffer data segment register 6 381: =000001AB CAN1RDSR7 equ $1aB ; CAN1 rx foreground buffer data segment register 7 382: =000001AC CAN1RDLR equ $1aC ; CAN1 rx foreground buffer data length register 383: =000001B0 CAN1TXFG equ $1b0 ; can1 tx foreground buffer thru +$1bf 384: =000001B0 CAN1TIDR0 equ $1b0 ; CAN1 tx foreground buffer identifier register 0 385: =000001B1 CAN1TIDR1 equ $1b1 ; CAN1 tx foreground buffer identifier register 1 386: =000001B2 CAN1TIDR2 equ $1b2 ; CAN1 tx foreground buffer identifier register 2 387: =000001B3 CAN1TIDR3 equ $1b3 ; CAN1 tx foreground buffer identifier register 3 388: =000001B4 CAN1TDSR0 equ $1b4 ; CAN1 tx foreground buffer data segment register 0 389: =000001B5 CAN1TDSR1 equ $1b5 ; CAN1 tx foreground buffer data segment register 1 390: =000001B6 CAN1TDSR2 equ $1b6 ; CAN1 tx foreground buffer data segment register 2 391: =000001B7 CAN1TDSR3 equ $1b7 ; CAN1 tx foreground buffer data segment register 3 392: =000001B8 CAN1TDSR4 equ $1b8 ; CAN1 tx foreground buffer data segment register 4 393: =000001B9 CAN1TDSR5 equ $1b9 ; CAN1 tx foreground buffer data segment register 5 394: =000001BA CAN1TDSR6 equ $1bA ; CAN1 tx foreground buffer data segment register 6 395: =000001BB CAN1TDSR7 equ $1bB ; CAN1 tx foreground buffer data segment register 7 396: =000001BC CAN1TDLR equ $1bC ; CAN1 tx foreground buffer data length register 397: =000001BD CAN1TBPR equ $1bD ; CAN1 tx foreground buffer transmit buffer priority register 398: =000001BE CAN1TSRH equ $1bE ; CAN1 tx foreground buffer transmit time stamp register high 399: =000001BF CAN1TSRL equ $1bF ; CAN1 tx foreground buffer transmit time stamp register low 400: 401: =000001C0 CAN2CTL0 equ $1c0 ; can2 control register 0 402: =000001C1 CAN2CTL1 equ $1c1 ; can2 control register 1 403: =000001C2 CAN2BTR0 equ $1c2 ; can2 bus timing register 0 404: =000001C3 CAN2BTR1 equ $1c3 ; can2 bus timing register 1 405: =000001C4 CAN2RFLG equ $1c4 ; can2 receiver flags 406: =000001C5 CAN2RIER equ $1c5 ; can2 receiver interrupt enables 407: =000001C6 CAN2TFLG equ $1c6 ; can2 transmit flags 408: =000001C7 CAN2TIER equ $1c7 ; can2 transmit interrupt enables 409: =000001C8 CAN2TARQ equ $1c8 ; can2 transmit message abort control 410: =000001C9 CAN2TAAK equ $1c9 ; can2 transmit message abort status 411: =000001CA CAN2TBSEL equ $1ca ; can2 transmit buffer select 412: =000001CB CAN2IDAC equ $1cb ; can2 identifier acceptance control 413: 414: =000001CE CAN2RXERR equ $1ce ; can2 receive error counter 415: =000001CF CAN2TXERR equ $1cf ; can2 transmit error counter 416: =000001D0 CAN2IDAR0 equ $1d0 ; can2 identifier acceptance register 0 417: =000001D1 CAN2IDAR1 equ $1d1 ; can2 identifier acceptance register 1 418: =000001D2 CAN2IDAR2 equ $1d2 ; can2 identifier acceptance register 2 419: =000001D3 CAN2IDAR3 equ $1d3 ; can2 identifier acceptance register 3 420: =000001D4 CAN2IDMR0 equ $1d4 ; can2 identifier mask register 0 421: =000001D5 CAN2IDMR1 equ $1d5 ; can2 identifier mask register 1 422: =000001D6 CAN2IDMR2 equ $1d6 ; can2 identifier mask register 2 423: =000001D7 CAN2IDMR3 equ $1d7 ; can2 identifier mask register 3 424: =000001D8 CAN2IDAR4 equ $1d8 ; can2 identifier acceptance register 4 425: =000001D9 CAN2IDAR5 equ $1d9 ; can2 identifier acceptance register 5 426: =000001DA CAN2IDAR6 equ $1da ; can2 identifier acceptance register 6 427: =000001DB CAN2IDAR7 equ $1db ; can2 identifier acceptance register 7 428: =000001DC CAN2IDMR4 equ $1dc ; can2 identifier mask register 4 429: =000001DD CAN2IDMR5 equ $1dd ; can2 identifier mask register 5 430: =000001DE CAN2IDMR6 equ $1de ; can2 identifier mask register 6 431: =000001DF CAN2IDMR7 equ $1df ; can2 identifier mask register 7 432: =000001E0 CAN2RXFG equ $1e0 ; can2 rx foreground buffer thru +$1ef 433: =000001E0 CAN2RIDR0 equ $1e0 ; CAN2 rx foreground buffer identifier register 0 434: =000001E1 CAN2RIDR1 equ $1e1 ; CAN2 rx foreground buffer identifier register 1 435: =000001E2 CAN2RIDR2 equ $1e2 ; CAN2 rx foreground buffer identifier register 2 436: =000001E3 CAN2RIDR3 equ $1e3 ; CAN2 rx foreground buffer identifier register 3 437: =000001E4 CAN2RDSR0 equ $1e4 ; CAN2 rx foreground buffer data segment register 0 438: =000001E5 CAN2RDSR1 equ $1e5 ; CAN2 rx foreground buffer data segment register 1 439: =000001E6 CAN2RDSR2 equ $1e6 ; CAN2 rx foreground buffer data segment register 2 440: =000001E7 CAN2RDSR3 equ $1e7 ; CAN2 rx foreground buffer data segment register 3 441: =000001E8 CAN2RDSR4 equ $1e8 ; CAN2 rx foreground buffer data segment register 4 442: =000001E9 CAN2RDSR5 equ $1e9 ; CAN2 rx foreground buffer data segment register 5 443: =000001EA CAN2RDSR6 equ $1eA ; CAN2 rx foreground buffer data segment register 6 444: =000001EB CAN2RDSR7 equ $1eB ; CAN2 rx foreground buffer data segment register 7 445: =000001EC CAN2RDLR equ $1eC ; CAN2 rx foreground buffer data length register 446: =000001F0 CAN2TXFG equ $1f0 ; can2 tx foreground buffer thru +$1ff 447: =000001F0 CAN2TIDR0 equ $1f0 ; CAN2 tx foreground buffer identifier register 0 448: =000001F1 CAN2TIDR1 equ $1f1 ; CAN2 tx foreground buffer identifier register 1 449: =000001F2 CAN2TIDR2 equ $1f2 ; CAN2 tx foreground buffer identifier register 2 450: =000001F3 CAN2TIDR3 equ $1f3 ; CAN2 tx foreground buffer identifier register 3 451: =000001F4 CAN2TDSR0 equ $1f4 ; CAN2 tx foreground buffer data segment register 0 452: =000001F5 CAN2TDSR1 equ $1f5 ; CAN2 tx foreground buffer data segment register 1 453: =000001F6 CAN2TDSR2 equ $1f6 ; CAN2 tx foreground buffer data segment register 2 454: =000001F7 CAN2TDSR3 equ $1f7 ; CAN2 tx foreground buffer data segment register 3 455: =000001F8 CAN2TDSR4 equ $1f8 ; CAN2 tx foreground buffer data segment register 4 456: =000001F9 CAN2TDSR5 equ $1f9 ; CAN2 tx foreground buffer data segment register 5 457: =000001FA CAN2TDSR6 equ $1fA ; CAN2 tx foreground buffer data segment register 6 458: =000001FB CAN2TDSR7 equ $1fB ; CAN2 tx foreground buffer data segment register 7 459: =000001FC CAN2TDLR equ $1fC ; CAN2 tx foreground buffer data length register 460: =000001FD CAN2TBPR equ $1fD ; CAN2 tx foreground buffer transmit buffer priority register 461: =000001FE CAN2TSRH equ $1fE ; CAN2 tx foreground buffer transmit time stamp register high 462: =000001FF CAN2TSRL equ $1fF ; CAN2 tx foreground buffer transmit time stamp register low 463: 464: =00000200 CAN3CTL0 equ $200 ; can3 control register 0 465: =00000201 CAN3CTL1 equ $201 ; can3 control register 1 466: =00000202 CAN3BTR0 equ $202 ; can3 bus timing register 0 467: =00000203 CAN3BTR1 equ $203 ; can3 bus timing register 1 468: =00000204 CAN3RFLG equ $204 ; can3 receiver flags 469: =00000205 CAN3RIER equ $205 ; can3 receiver interrupt enables 470: =00000206 CAN3TFLG equ $206 ; can3 transmit flags 471: =00000207 CAN3TIER equ $207 ; can3 transmit interrupt enables 472: =00000208 CAN3TARQ equ $208 ; can3 transmit message abort control 473: =00000209 CAN3TAAK equ $209 ; can3 transmit message abort status 474: =0000020A CAN3TBSEL equ $20a ; can3 transmit buffer select 475: =0000020B CAN3IDAC equ $20b ; can3 identifier acceptance control 476: 477: =0000020E CAN3RXERR equ $20e ; can3 receive error counter 478: =0000020F CAN3TXERR equ $20f ; can3 transmit error counter 479: =00000210 CAN3IDAR0 equ $210 ; can3 identifier acceptance register 0 480: =00000211 CAN3IDAR1 equ $211 ; can3 identifier acceptance register 1 481: =00000212 CAN3IDAR2 equ $212 ; can3 identifier acceptance register 2 482: =00000213 CAN3IDAR3 equ $213 ; can3 identifier acceptance register 3 483: =00000214 CAN3IDMR0 equ $214 ; can3 identifier mask register 0 484: =00000215 CAN3IDMR1 equ $215 ; can3 identifier mask register 1 485: =00000216 CAN3IDMR2 equ $216 ; can3 identifier mask register 2 486: =00000217 CAN3IDMR3 equ $217 ; can3 identifier mask register 3 487: =00000218 CAN3IDAR4 equ $218 ; can3 identifier acceptance register 4 488: =00000219 CAN3IDAR5 equ $219 ; can3 identifier acceptance register 5 489: =0000021A CAN3IDAR6 equ $21a ; can3 identifier acceptance register 6 490: =0000021B CAN3IDAR7 equ $21b ; can3 identifier acceptance register 7 491: =0000021C CAN3IDMR4 equ $21c ; can3 identifier mask register 4 492: =0000021D CAN3IDMR5 equ $21d ; can3 identifier mask register 5 493: =0000021E CAN3IDMR6 equ $21e ; can3 identifier mask register 6 494: =0000021F CAN3IDMR7 equ $21f ; can3 identifier mask register 7 495: =00000220 CAN3RXFG equ $220 ; can3 rx foreground buffer thru +$22f 496: =00000220 CAN3RIDR0 equ $220 ; CAN3 rx foreground buffer identifier register 0 497: =00000221 CAN3RIDR1 equ $221 ; CAN3 rx foreground buffer identifier register 1 498: =00000222 CAN3RIDR2 equ $222 ; CAN3 rx foreground buffer identifier register 2 499: =00000223 CAN3RIDR3 equ $223 ; CAN3 rx foreground buffer identifier register 3 500: =00000224 CAN3RDSR0 equ $224 ; CAN3 rx foreground buffer data segment register 0 501: =00000225 CAN3RDSR1 equ $225 ; CAN3 rx foreground buffer data segment register 1 502: =00000226 CAN3RDSR2 equ $226 ; CAN3 rx foreground buffer data segment register 2 503: =00000227 CAN3RDSR3 equ $227 ; CAN3 rx foreground buffer data segment register 3 504: =00000228 CAN3RDSR4 equ $228 ; CAN3 rx foreground buffer data segment register 4 505: =00000229 CAN3RDSR5 equ $229 ; CAN3 rx foreground buffer data segment register 5 506: =0000022A CAN3RDSR6 equ $22A ; CAN3 rx foreground buffer data segment register 6 507: =0000022B CAN3RDSR7 equ $22B ; CAN3 rx foreground buffer data segment register 7 508: =0000022C CAN3RDLR equ $22C ; CAN3 rx foreground buffer data length register 509: =00000230 CAN3TXFG equ $230 ; can3 tx foreground buffer thru +$23f 510: =00000230 CAN3TIDR0 equ $230 ; CAN3 tx foreground buffer identifier register 0 511: =00000231 CAN3TIDR1 equ $231 ; CAN3 tx foreground buffer identifier register 1 512: =00000232 CAN3TIDR2 equ $232 ; CAN3 tx foreground buffer identifier register 2 513: =00000233 CAN3TIDR3 equ $233 ; CAN3 tx foreground buffer identifier register 3 514: =00000234 CAN3TDSR0 equ $234 ; CAN3 tx foreground buffer data segment register 0 515: =00000235 CAN3TDSR1 equ $235 ; CAN3 tx foreground buffer data segment register 1 516: =00000236 CAN3TDSR2 equ $236 ; CAN3 tx foreground buffer data segment register 2 517: =00000237 CAN3TDSR3 equ $237 ; CAN3 tx foreground buffer data segment register 3 518: =00000238 CAN3TDSR4 equ $238 ; CAN3 tx foreground buffer data segment register 4 519: =00000239 CAN3TDSR5 equ $239 ; CAN3 tx foreground buffer data segment register 5 520: =0000023A CAN3TDSR6 equ $23A ; CAN3 tx foreground buffer data segment register 6 521: =0000023B CAN3TDSR7 equ $23B ; CAN3 tx foreground buffer data segment register 7 522: =0000023C CAN3TDLR equ $23C ; CAN3 tx foreground buffer data length register 523: =0000023D CAN3TBPR equ $23D ; CAN3 tx foreground buffer transmit buffer priority register 524: =0000023E CAN3TSRH equ $23E ; CAN3 tx foreground buffer transmit time stamp register high 525: =0000023F CAN3TSRL equ $23F ; CAN3 tx foreground buffer transmit time stamp register low 526: 527: =00000240 PTT equ $240 ; portt data register 528: =00000241 PTIT equ $241 ; portt input register 529: =00000242 DDRT equ $242 ; portt direction register 530: =00000243 RDRT equ $243 ; portt reduced drive register 531: =00000244 PERT equ $244 ; portt pull device enable 532: =00000245 PPST equ $245 ; portt pull polarity select 533: 534: =00000248 PTS equ $248 ; ports data register 535: =00000249 PTIS equ $249 ; ports input register 536: =0000024A DDRS equ $24a ; ports direction register 537: =0000024B RDRS equ $24b ; ports reduced drive register 538: =0000024C PERS equ $24c ; ports pull device enable 539: =0000024D PPSS equ $24d ; ports pull polarity select 540: =0000024E WOMS equ $24e ; ports wired or mode register 541: 542: =00000250 PTM equ $250 ; portm data register 543: =00000251 PTIM equ $251 ; portm input register 544: =00000252 DDRM equ $252 ; portm direction register 545: =00000253 RDRM equ $253 ; portm reduced drive register 546: =00000254 PERM equ $254 ; portm pull device enable 547: =00000255 PPSM equ $255 ; portm pull polarity select 548: =00000256 WOMM equ $256 ; portm wired or mode register 549: =00000257 MODRR equ $257 ; portm module routing register 550: =00000258 PTP equ $258 ; portp data register 551: =00000259 PTIP equ $259 ; portp input register 552: =0000025A DDRP equ $25a ; portp direction register 553: =0000025B RDRP equ $25b ; portp reduced drive register 554: =0000025C PERP equ $25c ; portp pull device enable 555: =0000025D PPSP equ $25d ; portp pull polarity select 556: =0000025E PIEP equ $25e ; portp interrupt enable register 557: =0000025F PIFP equ $25f ; portp interrupt flag register 558: =00000260 PTH equ $260 ; porth data register 559: =00000261 PTIH equ $261 ; porth input register 560: =00000262 DDRH equ $262 ; porth direction register 561: =00000263 RDRH equ $263 ; porth reduced drive register 562: =00000264 PERH equ $264 ; porth pull device enable 563: =00000265 PPSH equ $265 ; porth pull polarity select 564: =00000266 PIEH equ $266 ; porth interrupt enable register 565: =00000267 PIFH equ $267 ; porth interrupt flag register 566: =00000268 PTJ equ $268 ; portp data register 567: =00000269 PTIJ equ $269 ; portp input register 568: =0000026A DDRJ equ $26a ; portp direction register 569: =0000026B RDRJ equ $26b ; portp reduced drive register 570: =0000026C PERJ equ $26c ; portp pull device enable 571: =0000026D PPSJ equ $26d ; portp pull polarity select 572: =0000026E PIEJ equ $26e ; portp interrupt enable register 573: =0000026F PIFJ equ $26f ; portp interrupt flag register 574: 575: =00000280 CAN4CTL0 equ $280 ; can4 control register 0 576: =00000281 CAN4CTL1 equ $281 ; can4 control register 1 577: =00000282 CAN4BTR0 equ $282 ; can4 bus timing register 0 578: =00000283 CAN4BTR1 equ $283 ; can4 bus timing register 1 579: =00000284 CAN4RFLG equ $284 ; can4 receiver flags 580: =00000285 CAN4RIER equ $285 ; can4 receiver interrupt enables 581: =00000286 CAN4TFLG equ $286 ; can4 transmit flags 582: =00000287 CAN4TIER equ $287 ; can4 transmit interrupt enables 583: =00000288 CAN4TARQ equ $288 ; can4 transmit message abort control 584: =00000289 CAN4TAAK equ $289 ; can4 transmit message abort status 585: =0000028A CAN4TBSEL equ $28a ; can4 transmit buffer select 586: =0000028B CAN4IDAC equ $28b ; can4 identifier acceptance control 587: 588: =0000028E CAN4RXERR equ $28e ; can4 receive error counter 589: =0000028F CAN4TXERR equ $28f ; can4 transmit error counter 590: =00000290 CAN4IDAR0 equ $290 ; can4 identifier acceptance register 0 591: =00000291 CAN4IDAR1 equ $291 ; can4 identifier acceptance register 1 592: =00000292 CAN4IDAR2 equ $292 ; can4 identifier acceptance register 2 593: =00000293 CAN4IDAR3 equ $293 ; can4 identifier acceptance register 3 594: =00000294 CAN4IDMR0 equ $294 ; can4 identifier mask register 0 595: =00000295 CAN4IDMR1 equ $295 ; can4 identifier mask register 1 596: =00000296 CAN4IDMR2 equ $296 ; can4 identifier mask register 2 597: =00000297 CAN4IDMR3 equ $297 ; can4 identifier mask register 3 598: =00000298 CAN4IDAR4 equ $298 ; can4 identifier acceptance register 4 599: =00000299 CAN4IDAR5 equ $299 ; can4 identifier acceptance register 5 600: =0000029A CAN4IDAR6 equ $29a ; can4 identifier acceptance register 6 601: =0000029B CAN4IDAR7 equ $29b ; can4 identifier acceptance register 7 602: =0000029C CAN4IDMR4 equ $29c ; can4 identifier mask register 4 603: =0000029D CAN4IDMR5 equ $29d ; can4 identifier mask register 5 604: =0000029E CAN4IDMR6 equ $29e ; can4 identifier mask register 6 605: =0000029F CAN4IDMR7 equ $29f ; can4 identifier mask register 7 606: =000002A0 CAN4RXFG equ $2a0 ; can4 rx foreground buffer thru +$2af 607: =000002A0 CAN4RIDR0 equ $2a0 ; CAN4 rx foreground buffer identifier register 0 608: =000002A1 CAN4RIDR1 equ $2a1 ; CAN4 rx foreground buffer identifier register 1 609: =000002A2 CAN4RIDR2 equ $2a2 ; CAN4 rx foreground buffer identifier register 2 610: =000002A3 CAN4RIDR3 equ $2a3 ; CAN4 rx foreground buffer identifier register 3 611: =000002A4 CAN4RDSR0 equ $2a4 ; CAN4 rx foreground buffer data segment register 0 612: =000002A5 CAN4RDSR1 equ $2a5 ; CAN4 rx foreground buffer data segment register 1 613: =000002A6 CAN4RDSR2 equ $2a6 ; CAN4 rx foreground buffer data segment register 2 614: =000002A7 CAN4RDSR3 equ $2a7 ; CAN4 rx foreground buffer data segment register 3 615: =000002A8 CAN4RDSR4 equ $2a8 ; CAN4 rx foreground buffer data segment register 4 616: =000002A9 CAN4RDSR5 equ $2a9 ; CAN4 rx foreground buffer data segment register 5 617: =000002AA CAN4RDSR6 equ $2aA ; CAN4 rx foreground buffer data segment register 6 618: =000002AB CAN4RDSR7 equ $2aB ; CAN4 rx foreground buffer data segment register 7 619: =000002AC CAN4RDLR equ $2aC ; CAN4 rx foreground buffer data length register 620: =000002B0 CAN4TXFG equ $2b0 ; can4 tx foreground buffer thru +$2bf 621: =000002B0 CAN4TIDR0 equ $2b0 ; CAN4 tx foreground buffer identifier register 0 622: =000002B1 CAN4TIDR1 equ $2b1 ; CAN4 tx foreground buffer identifier register 1 623: =000002B2 CAN4TIDR2 equ $2b2 ; CAN4 tx foreground buffer identifier register 2 624: =000002B3 CAN4TIDR3 equ $2b3 ; CAN4 tx foreground buffer identifier register 3 625: =000002B4 CAN4TDSR0 equ $2b4 ; CAN4 tx foreground buffer data segment register 0 626: =000002B5 CAN4TDSR1 equ $2b5 ; CAN4 tx foreground buffer data segment register 1 627: =000002B6 CAN4TDSR2 equ $2b6 ; CAN4 tx foreground buffer data segment register 2 628: =000002B7 CAN4TDSR3 equ $2b7 ; CAN4 tx foreground buffer data segment register 3 629: =000002B8 CAN4TDSR4 equ $2b8 ; CAN4 tx foreground buffer data segment register 4 630: =000002B9 CAN4TDSR5 equ $2b9 ; CAN4 tx foreground buffer data segment register 5 631: =000002BA CAN4TDSR6 equ $2bA ; CAN4 tx foreground buffer data segment register 6 632: =000002BB CAN4TDSR7 equ $2bB ; CAN4 tx foreground buffer data segment register 7 633: =000002BC CAN4TDLR equ $2bC ; CAN4 tx foreground buffer data length register 634: =000002BD CAN4TBPR equ $2bD ; CAN4 tx foreground buffer transmit buffer priority register 635: =000002BE CAN4TSRH equ $2bE ; CAN4 tx foreground buffer transmit time stamp register high 636: =000002BF CAN4TSRL equ $2bF ; CAN4 tx foreground buffer transmit time stamp register low 637: * end of register definitions 638: ; ************************************************************************************* 639: ; flash and EEPROM memory command 640: ; ************************************************************************************* 641: =00000020 Program equ $20 ; program a flash or EEPROM word 642: =00000005 EraseVerify equ $05 ; Erase and verify flash and EEPROM, BLANK bit will be set 643: =00000040 SectorErase equ $40 ; Erase a sector of flash or EEPROM 644: =00000041 BulkErase equ $41 ; Bulk erase the flash or EEPROM 645: =00000060 SectorModify equ $60 ; Erase a sector (4 bytes), program a word (2 bytes) 646: ; ************************************************************************************* 647: ; definitions of bits 648: ; ************************************************************************************* 649: =00000080 BIT7 equ $80 650: =00000040 BIT6 equ $40 651: =00000020 BIT5 equ $20 652: =00000010 BIT4 equ $10 653: =00000008 BIT3 equ $08 654: =00000004 BIT2 equ $04 655: =00000002 BIT1 equ $02 656: =00000001 BIT0 equ $01 657: =00000080 NOACCE equ $80 658: =00000020 PIPOE equ $20 659: =00000010 NECLK equ $10 660: =00000008 LSTRE equ $08 661: =00000004 RDWE equ $04 662: =00000080 MODC equ $80 663: =00000040 MODB equ $40 664: =00000020 MODA equ $20 665: =00000008 IVIS equ $08 666: =00000002 EMK equ $02 667: =00000001 EME equ $01 668: =00000080 PUPKE equ $80 669: =00000010 PUPEE equ $10 670: =00000002 PUPBE equ $02 671: =00000001 PUPAE equ $01 672: =00000080 RDPK equ $80 673: =00000010 RDPE equ $10 674: =00000002 RDPB equ $02 675: =00000001 RDPA equ $01 676: =00000001 ESTR equ $01 677: =00000008 EXSTR1 equ $08 678: =00000004 EXSTR0 equ $04 679: =00000002 ROMHM equ $02 680: =00000001 ROMON equ $01 681: =00000010 WRINT equ $10 682: =00000080 INTE equ $80 683: =00000040 INTC equ $40 684: =00000020 INTA equ $20 685: =00000010 INT8 equ $10 686: =00000008 INT6 equ $08 687: =00000004 INT4 equ $04 688: =00000002 INT2 equ $02 689: =00000001 INT0 equ $01 690: =00000080 IRQE equ $80 691: =00000040 IRQEN equ $40 692: =00000080 BKEN equ $80 693: =00000040 BKFULL equ $40 694: =00000020 BKBDM equ $20 695: =00000010 BKTAG equ $10 696: =00000008 BK0RWE equ $08 697: =00000004 BK0RW equ $04 698: =00000002 BK1RWE equ $02 699: =00000001 BK1RW equ $01 700: =00000080 RTIF equ $80 701: =00000040 PROF equ $40 702: =00000010 LOCKIF equ $10 703: =00000008 LOCK equ $08 704: =00000004 TRACK equ $04 705: =00000002 SCMIF equ $02 706: =00000001 SCM equ $01 707: =00000080 RTIE equ $80 708: =00000010 LOCKIE equ $10 709: =00000002 SCMIE equ $02 710: =00000080 PLLSEL equ $80 711: =00000040 PSTP equ $40 712: =00000020 SYSWAI equ $20 713: =00000010 ROAWAI equ $10 714: =00000008 PLLWAI equ $08 715: =00000004 CWAI equ $04 716: =00000002 RTIWAI equ $02 717: =00000001 COPWAI equ $01 718: =00000080 CME equ $80 719: =00000040 PLLON equ $40 720: =00000020 AUTO equ $20 721: =00000010 ACQ equ $10 722: =00000004 PRE equ $04 723: =00000002 PCE equ $02 724: =00000001 SCME equ $01 725: =00000080 WCOP equ $80 726: =00000040 RSBCK equ $40 727: =00000080 RTIBYP equ $80 728: =00000040 COPBYP equ $40 729: =00000010 PLLBYP equ $10 730: =00000002 FCM equ $02 731: =00000080 TEN equ $80 732: =00000040 TSWAI equ $40 733: =00000020 TSFRZ equ $20 734: =00000010 TFFCA equ $10 735: =00000080 C7I equ $80 736: =00000040 C6I equ $40 737: =00000020 C5I equ $20 738: =00000010 C4I equ $10 739: =00000008 C3I equ $08 740: =00000004 C2I equ $04 741: =00000002 C1I equ $02 742: =00000001 C0I equ $01 743: =00000080 C7F equ $80 744: =00000040 C6F equ $40 745: =00000020 C5F equ $20 746: =00000010 C4F equ $10 747: =00000008 C3F equ $08 748: =00000004 C2F equ $04 749: =00000002 C1F equ $02 750: =00000001 C0F equ $01 751: =00000080 OC7 equ $80 752: =00000040 OC6 equ $40 753: =00000020 OC5 equ $20 754: =00000010 OC4 equ $10 755: =00000008 OC3 equ $08 756: =00000004 OC2 equ $04 757: =00000002 OC1 equ $02 758: =00000001 OC0 equ $01 759: =00000080 IC7 equ $80 760: =00000040 IC6 equ $40 761: =00000020 IC5 equ $20 762: =00000010 IC4 equ $10 763: =00000008 IC3 equ $08 764: =00000004 IC2 equ $04 765: =00000002 IC1 equ $02 766: =00000001 IC0 equ $01 767: =00000080 IOS7 equ $80 768: =00000040 IOS6 equ $40 769: =00000020 IOS5 equ $20 770: =00000010 IOS4 equ $10 771: =00000008 IOS3 equ $08 772: =00000004 IOS2 equ $04 773: =00000002 IOS1 equ $02 774: =00000001 IOS0 equ $01 775: =00000080 NOVW7 equ $80 776: =00000040 NOVW6 equ $40 777: =00000020 NOVW5 equ $20 778: =00000010 NOVW4 equ $10 779: =00000008 NOVW3 equ $08 780: =00000004 NOVW2 equ $04 781: =00000002 NOVW1 equ $02 782: =00000001 NOVW0 equ $01 783: =00000008 TCRE equ $08 784: =00000040 PAEN equ $40 785: =00000020 PAMOD equ $20 786: =00000010 PEDGE equ $10 787: =00000008 CLK1 equ $08 788: =00000004 CLK0 equ $04 789: =00000002 PAOVI equ $02 790: =00000001 PAI equ $01 791: =00000002 PAOVF equ $02 792: =00000001 PAIF equ $01 793: =00000080 MCZI equ $80 794: =00000040 MODMC equ $40 795: =00000020 RDMCL equ $20 796: =00000010 ICLAT equ $10 797: =00000008 FLMC equ $08 798: =00000004 MCEN equ $04 799: =00000002 MCPR1 equ $02 800: =00000001 MCPR0 equ $01 801: =00000080 MCZF equ $80 802: =00000008 POLF3 equ $08 803: =00000004 POLF2 equ $04 804: =00000002 POLF1 equ $02 805: =00000001 POLF0 equ $01 806: =00000008 PAEN3 equ $08 807: =00000004 PAEN2 equ $04 808: =00000002 PAEN1 equ $02 809: =00000001 PAEN0 equ $01 810: =00000008 TFMOD equ $08 811: =00000004 PACMX equ $04 812: =00000002 BUFEN equ $02 813: =00000001 LATQ equ $01 814: =00000002 TCBYP equ $02 815: =00000040 PBEN equ $40 816: =00000002 PBOVI equ $02 817: =00000002 PBOVF equ $02 818: =00000080 ADPU equ $80 819: =00000040 AFFC equ $40 820: =00000020 AWAI equ $20 821: =00000010 ETRIGLE equ $10 822: =00000008 ETRIGP equ $08 823: =00000004 ETRIG equ $04 824: =00000002 ASCIE equ $02 825: =00000001 ASCIF equ $01 826: =00000080 SCF equ $80 827: =00000020 ETORF equ $20 828: =00000010 FIFOR equ $10 829: =00000080 CON67 equ $80 830: =00000040 CON45 equ $40 831: =00000020 CON23 equ $20 832: =00000010 CON01 equ $10 833: =00000008 PSWAI equ $08 834: =00000004 PFRZ equ $04 835: =00000080 PWMIF equ $80 836: =00000040 PWMIE equ $40 837: =00000020 PWMRSTRT equ $20 838: =00000010 PWMLVL equ $10 839: =00000004 PWM7IN equ $04 840: =00000002 PWM7INL equ $02 841: =00000001 PWM7ENA equ $01 842: =00000080 PWME7 equ $80 843: =00000040 PWME6 equ $40 844: =00000020 PWME5 equ $20 845: =00000010 PWME4 equ $10 846: =00000008 PWME3 equ $08 847: =00000004 PWME2 equ $04 848: =00000002 PWME1 equ $02 849: =00000001 PWME0 equ $01 850: =00000080 PCLK7 equ $80 851: =00000040 PCLK6 equ $40 852: =00000020 PCLK5 equ $20 853: =00000010 PCLK4 equ $10 854: =00000008 PCLK3 equ $08 855: =00000004 PCLK2 equ $04 856: =00000002 PCLK1 equ $02 857: =00000001 PCLK0 equ $01 858: =00000080 PPOL7 equ $80 859: =00000040 PPOL6 equ $40 860: =00000020 PPOL5 equ $20 861: =00000010 PPOL4 equ $10 862: =00000008 PPOL3 equ $08 863: =00000004 PPOL2 equ $04 864: =00000002 PPOL1 equ $02 865: =00000001 PPOL0 equ $01 866: =00000080 CAE7 equ $80 867: =00000040 CAE6 equ $40 868: =00000020 CAE5 equ $20 869: =00000010 CAE4 equ $10 870: =00000008 CAE3 equ $08 871: =00000004 CAE2 equ $04 872: =00000002 CAE1 equ $02 873: =00000001 CAE0 equ $01 874: =00000080 TIEN equ $80 875: =00000040 TCIE equ $40 876: =00000020 RIE equ $20 877: =00000010 ILIE equ $10 878: =00000008 TE equ $08 879: =00000004 RE equ $04 880: =00000002 RWU equ $02 881: =00000001 SBK equ $01 882: =00000080 TDRE equ $80 883: =00000040 TC equ $40 884: =00000020 RDRF equ $20 885: =00000010 IDLE equ $10 886: =00000008 OR equ $08 887: =00000004 NF equ $04 888: =00000002 FE equ $02 889: =00000001 PF equ $01 890: =00000004 BRK13 equ $04 891: =00000002 TXDIR equ $02 892: =00000001 RAF equ $01 893: =00000080 R8 equ $80 894: =00000040 T8 equ $40 895: =00000080 SPIF equ $80 896: =00000020 SPTEF equ $20 897: =00000010 MODF equ $10 898: =00000080 IBEN equ $80 899: =00000040 IBIE equ $40 900: =00000020 MSSL equ $20 901: =00000010 TXRX equ $10 902: =00000008 TXAK equ $08 903: =00000004 RSTA equ $04 904: =00000001 IBSWAI equ $01 905: =00000080 TCF equ $80 906: =00000040 IAAS equ $40 907: =00000020 IBB equ $20 908: =00000010 IBAL equ $10 909: =00000004 SRW equ $04 910: =00000002 IBIF equ $02 911: =00000001 RXAK equ $01 912: =00000080 IMSG equ $80 913: =00000040 CLKS equ $40 914: =00000002 IE equ $02 915: =00000001 WCM equ $01 916: =00000010 BDLCE equ $10 917: =00000001 BIDLE equ $01 ;idle bit of BDLC 918: =00000080 WUPIF equ $80 919: =00000040 CSCIF equ $40 920: =00000020 RSTAT1 equ $20 921: =00000010 RSTAT0 equ $10 922: =00000008 TSTAT1 equ $08 923: =00000004 TSTAT0 equ $04 924: =00000080 CANE equ $80 925: =00000002 OVRIF equ $02 926: =00000001 RXF equ $01 927: =00000001 INITRQ equ $01 928: =00000001 INITAK equ $01 929: =00000002 SLPRQ equ $02 930: =00000002 SLPAK equ $02 931: =00000080 WUPIE equ $80 932: =00000040 CSCIE equ $40 933: =00000020 RSTATE1 equ $20 934: =00000010 RSTATE0 equ $10 935: =00000008 TSTATE1 equ $08 936: =00000004 TSTATE0 equ $04 937: =00000002 OVRIE equ $02 938: =00000001 RXFIE equ $01 939: =00000004 TXE2 equ $04 940: =00000002 TXE1 equ $02 941: =00000001 TXE0 equ $01 942: =00000004 TXEIE2 equ $04 943: =00000002 TXEIE1 equ $02 944: =00000001 TXEIE0 equ $01 945: =00000004 TX2 equ $04 946: =00000002 TX1 equ $02 947: =00000001 TX0 equ $01 948: =00000080 FDIVLD equ $80 ; clock divider loaded 949: =00000080 EDIVLD equ $80 ; " 950: =00000040 PRDIV8 equ $40 ; enable divider by 8 bit 951: =00000080 KEYEN equ $80 ; enable backdoor key to security 952: =00000010 WRALL equ $10 ; write to all register banks 953: =00000080 CBEIE equ $80 ; command buffer empty interrupt enable 954: =00000040 CCIE equ $40 ; command completion interrupt enable 955: =00000020 KEYACC equ $20 ; enable security key writing 956: =00000080 FPOPEN equ $80 ; Opens the flash for program or erase 957: =00000080 EPOPEN equ $80 ; Opens the EEPROM for program or erase 958: =00000008 EPDIS equ $08 ; EEPROM protection address range disable 959: =00000020 FPHDIS equ $20 ; flash protection higher address range disable 960: =00000004 FPLDIS equ $04 ; flash protection lower address range disable 961: =00000080 CBEIF equ $80 ; command buffer empty interrupt flag 962: =00000040 CCIF equ $40 ; command complete interrupt flag 963: =00000020 PVIOL equ $20 ; protection violation interrupt flag 964: =00000010 ACCERR equ $10 ; access error flag 965: =00000004 BLANK equ $04 ; array has been verified as erased 966: 967: ; D-Bug12 functions addresses 968: =0000EE80 main equ $EE80 969: =0000EE84 getchar equ $EE84 970: =0000EE86 putchar equ $EE86 971: =0000EE88 printf equ $EE88 972: =0000EE8A getcmdline equ $EE8A 973: =0000EE8E sscanhex equ $EE8E 974: =0000EE92 isxdigit equ $EE92 975: =0000EE94 toupper equ $EE94 976: =0000EE96 isalpha equ $EE96 977: =0000EE98 strlen equ $EE98 978: =0000EE9A strcpy equ $EE9A 979: =0000EE9C out2hex equ $EE9C 980: =0000EEA0 out4hex equ $EEA0 981: =0000EEA4 setuservector equ $EEA4 982: =0000EEA6 writeeebyte equ $EEA6 983: =0000EEAA eraseee equ $EEAA 984: =0000EEAE readmem equ $EEAE 985: =0000EEB2 writemem equ $EEB2 986: ; D-Bug12 SRAM vector table 987: =00003E00 UserRsrv$80 equ $3E00 988: =00003E02 UserRsrv$82 equ $3E02 989: =00003E04 UserRsrv$84 equ $3E04 990: =00003E06 UserRsrv$86 equ $3E06 991: =00003E08 UserRsrv$88 equ $3E08 992: =00003E0A UserRsrv$8a equ $3E0A 993: =00003E0C UserPWMShDn equ $3E0C 994: =00003E0E UserPortP equ $3E0E 995: =00003E10 UserMSCAN4Tx equ $3E10 996: =00003E12 UserMSCAN4Rx equ $3E12 997: =00003E14 UserMSCAN4Errs equ $3E14 998: =00003E16 UserMSCAN4Wake equ $3E16 999: =00003E18 UserMSCAN3Tx equ $3E18 1000: =00003E1A UserMSCAN3Rx equ $3E1A 1001: =00003E1C UserMSCAN3Errs equ $3E1C 1002: =00003E1E UserMSCAN3Wake equ $3E1E 1003: =00003E20 UserMSCAN2Tx equ $3E20 1004: =00003E22 UserMSCAN2Rx equ $3E22 1005: =00003E24 UserMSCAN2Errs equ $3E24 1006: =00003E26 UserMSCAN2Wake equ $3E26 1007: =00003E28 UserMSCAN1Tx equ $3E28 1008: =00003E2A UserMSCAN1Rx equ $3E2A 1009: =00003E2C UserMSCAN1Errs equ $3E2C 1010: =00003E2E UserMSCAN1Wake equ $3E2E 1011: =00003E30 UserMSCAN0Tx equ $3E30 1012: =00003E32 UserMSCAN0Rx equ $3E32 1013: =00003E34 UserMSCAN0Errs equ $3E34 1014: =00003E36 UserMSCAN0Wake equ $3E36 1015: =00003E38 UserFlash equ $3E38 1016: =00003E3A UserEEPROM equ $3E3A 1017: =00003E3C UserSPI2 equ $3E3C 1018: =00003E3E UserSPI1 equ $3E3E 1019: =00003E40 UserIIC equ $3E40 1020: =00003E42 UserDLC equ $3E42 1021: =00003E44 UserSCME equ $3E44 1022: =00003E46 UserCRG equ $3E46 1023: =00003E48 UserPAccBOv equ $3E48 1024: =00003E4A UserModDwnCtr equ $3E4A 1025: =00003E4C UserPortH equ $3E4C 1026: =00003E4E UserPortJ equ $3E4E 1027: =00003E50 UserAtoD1 equ $3E50 1028: =00003E52 UserAtoD0 equ $3E52 1029: =00003E54 UserSCI1 equ $3E54 1030: =00003E56 UserSCI0 equ $3E56 1031: =00003E58 UserSPI0 equ $3E58 1032: =00003E5A UserPAccEdge equ $3E5A 1033: =00003E5C UserPAccOvf equ $3E5C 1034: =00003E5E UserTimerOvf equ $3E5E 1035: =00003E60 UserTimerCh7 equ $3E60 1036: =00003E62 UserTimerCh6 equ $3E62 1037: =00003E64 UserTimerCh5 equ $3E64 1038: =00003E66 UserTimerCh4 equ $3E66 1039: =00003E68 UserTimerCh3 equ $3E68 1040: =00003E6A UserTimerCh2 equ $3E6A 1041: =00003E6C UserTimerCh1 equ $3E6C 1042: =00003E6E UserTimerCh0 equ $3E6E 1043: =00003E70 UserRTI equ $3E70 1044: =00003E72 UserIRQ equ $3E72 1045: =00003E74 UserXIRQ equ $3E74 1046: =00003E76 UserSWI equ $3E76 1047: =00003E78 UserTrap equ $3E78 1048: ; end of user SRAM interrupt vector table 1049: ; Axiom CML12SDP256 demo board utils 1050: =0000FF16 rprint equ $FF16 ; display user registers 1051: =0000FF4F outa equ $FF4F ; output ascii character in A 1052: =0000FF52 out1byt equ $FF52 ; display the hex value pointed to by X 1053: =0000FF55 out1bsp equ $FF55 ; out1byt followed by a space 1054: =0000FF58 out2bsp equ $FF58 ; display 2 hex bytes pointed to by X 1055: =0000FF5B outcrlf equ $FF5B ; output a carriage return and a line feed to terminal 1056: =0000FF5E outstrg equ $FF5E ; display the string pointed to by X (terminated by $04) preceded by CR/LF 1057: =0000FF5E outstrg0 equ $FF5E ; display the string pointed to by X (terminated by $04)without initial CR/LF 1058: =0000FF64 inchar equ $FF64 ; wait for and input a char from terminal 2: =00001500 org $1500 3: 1500 CF 1500 lds #$1500 4: 1503 CE 1000 ldx #$1000 ; use index register X as a pointer to the buffer 5: 1506 16 152D jsr openAD0 ; initialize the ATD0 converter 6: 1509 CD 0005 ldy #5 7: 150C 180B 87 0085 loop5 movb #$87,ATD0CTL5 ; start an A/D conversion sequence 8: 1511 4F 86 80 FC brclr ATD0STAT0,SCF,* 9: 1515 1801 31 0090 movw ATD0DR0,2,x+ ; collect and save the conversion results 10: 151A 1801 31 0092 movw ATD0DR1,2,x+ ; post-increment the pointer by 2 11: 151F 1801 31 0094 movw ATD0DR2,2,x+ ; “ 12: 1524 1801 31 0096 movw ATD0DR3,2,x+ ; “ 13: 1529 04 36 E0 dbne y,loop5 14: 152C 3F swi 15: 152D 180B E0 0082 openAD0 movb #$E0,ATD0CTL2 16: 1532 16 1540 jsr wait20us ; wait for 20 us 17: 1535 180B 22 0083 movb #$22,ATD0CTL3 18: 153A 180B 05 0084 movb #$05,ATD0CTL4 19: 153F 3D rts 20: 1540 180B 90 0046 wait20us movb #$90,TSCR1 ; enable TCNT and fast timer flag clear 21: 1545 180B 00 004D movb #0,TSCR2 ; set TCNT prescaler to 1 22: 154A 4C 40 01 bset TIOS,$01 ; enable OC0 23: 154D DC 44 ldd TCNT ; start an OC0 operation 24: 154F C3 01E0 addd #480 ; “ 25: 1552 5C 50 std TC0 ; “ 26: 1554 4F 4E 01 FC brclr TFLG1,C0F,* ; wait for 20 us 27: 1558 3D rts 28: end Symbols: atd0ctl2 *00000082 atd0ctl3 *00000083 atd0ctl4 *00000084 atd0ctl5 *00000085 atd0dr0 *00000090 atd0dr1 *00000092 atd0dr2 *00000094 atd0dr3 *00000096 atd0stat0 *00000086 c0f *00000001 loop5 *0000150c openad0 *0000152d scf *00000080 tc0 *00000050 tcnt *00000044 tflg1 *0000004e tios *00000040 tscr1 *00000046 tscr2 *0000004d wait20us *00001540