load#include        "c:\IDEhcs12\Reg9s12.h"
		org     $1000
count           db      1
		org     $1500
		clr     count   	; initialize count to 0
		movb	#$FF,ddrb	; configure PORTB for output
loop		movb    count,portb
		jsr     wait_hs 	; wait for half of a second
		inc	count
		bra     loop
; ********************************************************************
; The following subroutine creates a delay of 5 x 60000 x 40 =
; 12,000,000 E cycles delay (0.5 sec at 24 MHz).
; ********************************************************************
wait_hs		ldab	#5	; 1 E cycle
out_loop	ldx	#60000	; 2 E cycles
inner_loop	psha            ; 2 E cycles
		pula            ; 3 E cycles
		psha
		pula
		psha
		pula
		psha
		pula
		psha
		pula
		psha
		pula
		psha
		pula
		psha
		pula
		psha
		pula
		nop
		nop
		dbne	x,inner_loop    ; 3 E cycles
		dbne	b,out_loop	; 3 E cycles
		rts
		end